These -m
options are defined for the MIPS family of computers:
-march=
cpu-type
r2000
, r3000
,
r3900
, r4000
, r4100
, r4300
, r4400
,
r4600
, r4650
, r5000
, r6000
, r8000
,
and orion
. Additionally, the r2000
, r3000
,
r4000
, r5000
, and r6000
can be abbreviated as
r2k
(or r2K
), r3k
, etc.
-mtune=
cpu-type
r2000
, r3000
,
r3900
, r4000
, r4100
, r4300
, r4400
,
r4600
, r4650
, r5000
, r6000
, r8000
,
and orion
. Additionally, the r2000
, r3000
,
r4000
, r5000
, and r6000
can be abbreviated as
r2k
(or r2K
), r3k
, etc. While picking a specific
cpu-type will schedule things appropriately for that particular
chip, the compiler will not generate any code that does not meet level 1
of the MIPS ISA (instruction set architecture) without a -mipsX
or -mabi
switch being used.
-mcpu=
cpu-type
-march
and -mtune
.
-mips1
r3000
is the default cpu-type at this ISA level.
-mips2
r6000
is the default cpu-type at this
ISA level.
-mips3
r4000
is the default cpu-type at this ISA level.
-mips4
r8000
is the default
cpu-type at this ISA level.
-mfp32
-mfp64
-mips3
option is used.
-mfused-madd
-mno-fused-madd
-mgp32
-mgp64
-mips3
option is used.
-mint64
-mlong32
for an
explanation of the default, and the width of pointers.
-mlong64
-mlong32
for an
explanation of the default, and the width of pointers.
-mlong32
If none of -mlong32
, -mlong64
, or -mint64
are set,
the size of ints, longs, and pointers depends on the ABI and ISA chosen.
For -mabi=32
, and -mabi=n32
, ints and longs are 32 bits
wide. For -mabi=64
, ints are 32 bits, and longs are 64 bits wide.
For -mabi=eabi
and either -mips1
or -mips2
, ints
and longs are 32 bits wide. For -mabi=eabi
and higher ISAs, ints
are 32 bits, and longs are 64 bits wide. The width of pointer types is
the smaller of the width of longs or the width of general purpose
registers (which in turn depends on the ISA).
-mabi=32
-mabi=o64
-mabi=n32
-mabi=64
-mabi=eabi
-mips1
for 32
, -mips3
for n32
, and
-mips4
otherwise. Conversely, with -mips1
or
-mips2
, the default ABI is 32
; otherwise, the default ABI
is 64
.
-mmips-as
mips-tfile
to
add normal debug information. This is the default for all
platforms except for the OSF/1 reference platform, using the OSF/rose
object format. If the either of the -gstabs
or -gstabs+
switches are used, the mips-tfile
program will encapsulate the
stabs within MIPS ECOFF.
-mgas
--with-gnu-as
is used.
-msplit-addresses
-mno-split-addresses
-mrnames
-mno-rnames
-mrnames
switch says to output code using the MIPS software
names for the registers, instead of the hardware names (ie, a0
instead of $4). The only known assembler that supports this option
is the Algorithmics assembler.
-mgpopt
-mno-gpopt
-mgpopt
switch says to write all of the data declarations
before the instructions in the text section, this allows the MIPS
assembler to generate one word memory references instead of using two
words for short global or static data items. This is on by default if
optimization is selected.
-mstats
-mno-stats
-mstats
switch
causes the compiler to emit one line to the standard error file to
print statistics about the program (number of registers saved, stack
size, etc.).
-mmemcpy
-mno-memcpy
-mmemcpy
switch makes all block moves call the appropriate
string function (memcpy
or bcopy
) instead of possibly
generating inline code.
-mmips-tfile
-mno-mips-tfile
-mno-mips-tfile
switch causes the compiler not
postprocess the object file with the mips-tfile
program,
after the MIPS assembler has generated it to add debug support. If
mips-tfile
is not run, then no local variables will be
available to the debugger. In addition, stage2
and
stage3
objects will have the temporary file names passed to the
assembler embedded in the object file, which means the objects will
not compare the same. The -mno-mips-tfile
switch should only
be used when there are bugs in the mips-tfile
program that
prevents compilation.
-msoft-float
-mhard-float
-mabicalls
-mno-abicalls
.abicalls
,
.cpload
, and .cprestore
that some System V.4 ports use for
position independent code.
-mlong-calls
-mno-long-calls
JALR
instruction, which requires
loading up a function's address into a register before the call.
You need to use this switch, if you call outside of the current
512 megabyte segment to functions that are not through pointers.
-mhalf-pic
-mno-half-pic
-membedded-pic
-mno-embedded-pic
-membedded-data
-mno-embedded-data
-muninit-const-in-rodata
-mno-uninit-const-in-rodata
-membedded-data
, it will always store uninitialized
const variables in the read-only data section.
-msingle-float
-mdouble-float
-msingle-float
switch tells gcc to assume that the floating
point coprocessor only supports single precision operations, as on the
r4650
chip. The -mdouble-float
switch permits gcc to use
double precision operations. This is the default.
-mmad
-mno-mad
mad
, madu
and mul
instructions,
as on the r4650
chip.
-m4650
-msingle-float
, -mmad
, and, at least for now,
-mcpu=r4650
.
-mips16
-mno-mips16
-mentry
-mips16
.
-EL
-EB
-G
num
-G
num
switch is also passed to the assembler and linker.
All modules should be compiled with the same -G
num
value.
-nocpp
.s
suffix) when assembling them.
-mfix7000
-no-crt0
-mflush-func=
func
-mno-flush-func
_flush_func()
, that is, the address of the
memory range for which the cache is being flushed, the size of the
memory range, and the number 3 (to flush both caches). The default
depends on the target gcc was configured for, but commonly is either
_flush_func
or __cpu_flush
.
These options are defined by the macro
TARGET_SWITCHES
in the machine description. The default for the
options is also defined by that macro, which enables you to change the
defaults.