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3.17.32 NDS32 Options

These options are defined for NDS32 implementations:

Generate code in big-endian mode.
Generate code in little-endian mode.
Use reduced-set registers for register allocation.
Use full-set registers for register allocation.
Generate conditional move instructions.
Do not generate conditional move instructions.
Generate performance extension instructions.
Do not generate performance extension instructions.
Generate v3 push25/pop25 instructions.
Do not generate v3 push25/pop25 instructions.
Generate 16-bit instructions.
Do not generate 16-bit instructions.
Generate GP base instructions directly.
Do no generate GP base instructions directly.
Specify the size of each interrupt vector, which must be 4 or 16.
Specify the size of each cache block, which must be a power of 2 between 4 and 512.
Specify the name of the target architecture.
Prevent $fp being allocated during register allocation so that compiler is able to force performing fp-as-gp optimization.
Forbid using $fp to access static and global variables. This option strictly forbids fp-as-gp optimization regardless of -mforce-fp-as-gp.
Use special directives to guide linker doing ex9 optimization.
Enable constructor/destructor feature.
Guide linker to relax instructions.