GCC allows the size of a hardware register to be a runtime invariant rather than a compile-time constant. This in turn means that various sizes and offsets must also be runtime invariants rather than compile-time constants, such as:
machine_mode
(see Machine Modes);
mem
rtx (see Registers and Memory); and
subreg
rtx (see Registers and Memory).
The motivating example is the Arm SVE ISA, whose vector registers can be any multiple of 128 bits between 128 and 2048 inclusive. The compiler normally produces code that works for all SVE register sizes, with the actual size only being known at runtime.
GCC’s main representation of such runtime invariants is the
poly_int
class. This chapter describes what poly_int
does, lists the available operations, and gives some general
usage guidelines.